[OSC_dev] OSC Questions regarding Protocol

[Adrian Freed]

>Christopher Graham wrote:
>>  > OSC avoids the end-to-end principle by design.
>>  >
>>  > For efficiency discussions also note that OSC generally assumes
>>  > a 32-
>>  > bit architecture, thus the 4-byte alignment saves instruction
>>  > cycles
>>  > and costs no additional memory. 
>
>The no memory argument is only valid assuming the compiler uses a 4 byte
>struct alignment, however, if using byte aligned structs, as one tends
>to do in embedded systems, it does.

We have been combining embedded systems with fast laptops and desktops for years. It is the combination of the two that makes our applications possible. Now the embedded systems like the make controller have wide buses and alignment so there is a danger that this is a strawman issue.


>
>As for the machine cycles, have there been conclusive tests to show that
>the instructions saved by optimising this way more than compensates for
>the extra instructions used to pad the data?

Not that I know of. For some processors misaligned data can be a 5-20x slowdown.
The cost to align data this way is very low. rounding up to a power of two is very cheap on all processors. Many situations where OSC messages are built are static structures that are built and reused anyway.